6229 search results - page 45 / 1246 » Models of Computation for Networks on Chip |
EUROPAR
2010
Springer
13 years 10 months ago
2010
Springer
Abstract. Performance of the on-chip cache is critical for processor. The multithread program model usually employed by on-chip many-core architectures may have effects on cache ac...
ERSA
2006
13 years 10 months ago
2006
Abstract-- With the constantly increasing gate capacity of FPGAs, a single FPGA chip is able to employ large-scale applications. To connect a large number of computational nodes, N...
ISMVL
2000
IEEE
14 years 1 months ago
2000
IEEE
Many believe that the most important result to come out of the last ten years of neural network research is the significant change in perspective in the neuroscience community tow...
GECCO
2003
Springer
14 years 2 months ago
2003
Springer
Continuous Time Recurrent Neural Networks (CTRNNs) have previously been proposed as an enabling paradigm for evolving analog electrical circuits to serve as controllers for physica...
LCTRTS
2010
Springer
13 years 6 months ago
2010
Springer
Chip multiprocessors (CMPs) are expected to be the building blocks for future computer systems. While architecting these emerging CMPs is a challenging problem on its own, program...