6229 search results - page 51 / 1246 » Models of Computation for Networks on Chip |
CORR
2011
Springer
13 years 12 days ago
2011
Springer
DSD
2002
IEEE
14 years 1 months ago
2002
IEEE
Continuing VLSI technology scaling raises several deep submicron (DSM) problems like relatively slow interconnect, power dissipation and distribution, and signal integrity. Those ...
SLIP
2009
ACM
14 years 3 months ago
2009
ACM
This paper proposes an efficient method to predict the worst case of voltage violation by multi-domain clock gating in a three-dimensional (3D) on-chip power network considering l...
NIPS
2003
13 years 10 months ago
2003
We describe a neuromorphic chip that utilizes transistor heterogeneity, introduced by the fabrication process, to generate orientation maps similar to those imaged in vivo. Our mo...
DAC
2006
ACM
14 years 9 months ago
2006
ACM
Modern integrated circuits (ICs) are becoming increasingly complex. The complexity makes it difficult to design, manufacture and integrate these high-performance ICs. The advent o...