This paper presents a transcoder which transcodes to FGS streams from H.264/AVC hierarchical B-pictures. First, the DCT-domain architecture is designed for fast FGS transcoding. T...
In this paper we present a new algorithm for computing reduced-order models of interconnect which utilizes the dominant controllable subspace of the system. The dominant controlla...
— In this paper we extend the definition of a Motion Description Language (MDL) to networked systems. This new construction (MDLn) supports inter-agent specification rules as w...
Patrick Martin, Jean-Pierre de la Croix, Magnus Eg...
ABSTRACT: We present a Built-In Self-Test (BIST) approach for programmable embedded memories in Xilinx Virtex-4 Field Programmable Gate Arrays (FPGAs). The target resources are the...
Brooks R. Garrison, Daniel T. Milton, Charles E. S...
In this paper, a new control approach for real time speed synchronization of multiple induction motors during speed acceleration and load changes is developed. The control strategy...