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DATE
2007
IEEE
114views Hardware» more  DATE 2007»
14 years 1 months ago
Two-level microprocessor-accelerator partitioning
The integration of microprocessors and field-programmable gate array (FPGA) fabric on a single chip increases both the utility and necessity of tools that automatically move softw...
Scott Sirowy, Yonghui Wu, Stefano Lonardi, Frank V...
IPPS
2005
IEEE
14 years 28 days ago
A Framework for Partitioning Computational Intensive Applications in Hybrid Reconfigurable Platforms
In this paper, we describe a prototype software framework that implements a formalized methodology for partitioning computational intensive applications between reconfigurable har...
Michalis D. Galanis, Athanasios Milidonis, George ...
DAC
2007
ACM
14 years 8 months ago
Trusted Hardware: Can It Be Trustworthy?
Processing and storage of confidential or critical information is an every day occurrence in computing systems. The trustworthiness of computing devices has become an important co...
Cynthia E. Irvine, Karl N. Levitt
EURODAC
1995
IEEE
131views VHDL» more  EURODAC 1995»
13 years 11 months ago
System level design, a VHDL based approach
A hierarchical system design flow was developed to facilitate concurrent development and Time-to-Market reductions. The system design flow provides for codesign of (embedded) driv...
Joris van den Hurk, Edwin Dilling
IWANN
1997
Springer
13 years 11 months ago
The Pattern Extraction Architecture: A Connectionist Alternative to the Von Neumann Architecture
A detailed connectionist architecture is described which is capable of relating psychological behavior to the functioning of neurons and neurochemicals. The need to be able to bui...
L. Andrew Coward