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» Motor: A Virtual Machine for High Performance Computing
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HPDC
2000
IEEE
14 years 1 months ago
Distributed Processor Allocation in Large PC Clusters
Current processor allocation techniques for highly parallel systems are based on centralized front-end based algorithms. As a result, the applied strategies are restricted to stat...
Hans-Ulrich Heiss, César A. F. De Rose, Phi...
FCCM
1999
IEEE
143views VLSI» more  FCCM 1999»
14 years 1 months ago
Implementation and Evaluation of a Prototype Reconfigurable Router
The evolution of computer networking technology will likely require hardware that is flexible enough to adapt to changing standards while maintaining the highest possible performa...
Jason R. Hess, David C. Lee, Scott J. Harper, Mark...
DSN
2004
IEEE
14 years 21 days ago
Efficient Byzantine-Tolerant Erasure-Coded Storage
This paper describes a decentralized consistency protocol for survivable storage that exploits local data versioning within each storage-node. Such versioning enables the protocol...
Garth R. Goodson, Jay J. Wylie, Gregory R. Ganger,...
MICRO
2003
IEEE
143views Hardware» more  MICRO 2003»
14 years 2 months ago
VSV: L2-Miss-Driven Variable Supply-Voltage Scaling for Low Power
Energy-efficient processor design is becoming more and more important with technology scaling and with high performance requirements. Supply-voltage scaling is an efficient way to...
Hai Li, Chen-Yong Cher, T. N. Vijaykumar, Kaushik ...
SPAA
2010
ACM
14 years 1 months ago
TLRW: return of the read-write lock
TL2 and similar STM algorithms deliver high scalability based on write-locking and invisible readers. In fact, no modern STM design locks to read along its common execution path b...
David Dice, Nir Shavit