1035 search results - page 161 / 207 » Motor: A Virtual Machine for High Performance Computing |
TOMS
1998
13 years 7 months ago
1998
This paper presents the software architecture and implementation of the problem solving environment (PSE) PELLPACK for modeling physical objects described by partial differential ...
EUROPAR
2004
Springer
14 years 1 months ago
2004
Springer
Scheduling parallel jobs has been an active investigation area. The scheduler has to deal with heterogeneous workloads and try to obtain throughputs and response times such that en...
ICML
2008
IEEE
14 years 8 months ago
2008
IEEE
We present a reinforcement learning architecture, Dyna-2, that encompasses both samplebased learning and sample-based search, and that generalises across states during both learni...
IPPS
2010
IEEE
13 years 5 months ago
2010
IEEE
Abstract--The now commonplace multi-core chips have introduced, by design, a deep hierarchy of memory and cache banks within parallel computers as a tradeoff between the user frien...
VLSID
2009
IEEE
14 years 8 months ago
2009
IEEE
The Translation Look-aside Buffer (TLB) is a very important part in the hardware support for virtual memory management implementation of high performance embedded systems. The TLB...