575 search results - page 44 / 115 » Multi-Valued Logic Synthesis |
JAR
2008
13 years 11 months ago
2008
This article presents detailed implementations of quantifier elimination for both integer and real linear arithmetic for theorem provers. The underlying algorithms are those by Coo...
ICML
1989
IEEE
14 years 3 months ago
1989
IEEE
Logic programming provides a uniform framework in which all aspects of explanation-based generalization and learning may be defined and carried out, but first-order Horn logic i...
DATE
2009
IEEE
14 years 3 months ago
2009
IEEE
In the digital VLSI cycle, logic transformations are often required to modify the design to meet different synthesis and optimization goals. Logic transformations on sequential ci...
ICCAD
2007
IEEE
14 years 5 months ago
2007
IEEE
—In latency-insensitive design shell modules are used to encapsulate system components (pearls) in order to interface them with the given latency-insensitive protocol and dynamic...
FMCAD
2006
Springer
14 years 2 months ago
2006
Springer
We present an approach to automatic synthesis of specifications given in Linear Time Logic. The approach is based on a translation through universal co-B