575 search results - page 50 / 115 » Multi-Valued Logic Synthesis |
DATE
1997
IEEE
14 years 2 months ago
1997
IEEE
A target structure for implementing fast edge-triggered control units is presented. In many cases, the proposed controller is faster than a one-hot encoded structure as its correc...
ISMVL
2010
IEEE
14 years 1 months ago
2010
IEEE
—Using EXOR gates in logic synthesis often results in smaller circuit realizations. While in AND/OR synthesis the problem definition is clear, in AND/EXOR synthesis several clas...
TCAD
2008
13 years 10 months ago
2008
State encoding is one of the most difficult problems in the synthesis of asynchronous controllers. This paper presents a method that can solve the problem of large controllers spec...
ITC
1997
IEEE
14 years 2 months ago
1997
IEEE
Tri-state buses and pass transistor logic are used in many complex applications to achieve high performance and small area. Such circuits often contain logic requiring one-hot sig...
EURODAC
1994
IEEE
14 years 2 months ago
1994
IEEE
Abstract -- A general framework for synthesis of asynchronous control circuits at the state graph level is proposed. The framework can consider both concurrency reduction as well a...