575 search results - page 95 / 115 » Multi-Valued Logic Synthesis |
EURODAC
1995
IEEE
14 years 1 months ago
1995
IEEE
This paper describes a method to optimize the performance of data paths. It is based on bit-level arithmetic transformations, and is especially suited to optimize large adder stru...
DAC
1994
ACM
14 years 1 months ago
1994
ACM
Regarding nite state machines as Markov chains facilitates the application of probabilistic methods to very large logic synthesis and formal veri cation problems. Recently, we ha...
CEE
2010
13 years 8 months ago
2010
A new implementation for minimally redundant radix-4 floating-point SRT division/square-root (division/sqrt) with the recurrence in the signed-digit format is introduced. The imp...
FPGA
2006
ACM
14 years 1 months ago
2006
ACM
In this paper, we propose a technique to flexibly implement genetic algorithms for various problems on FPGAs. For the purpose, we propose a basic architecture for GA which consist...
DAC
1994
ACM
14 years 1 months ago
1994
ACM
In this paper, we revisit the classical problem of functional decomposition [1, 2] that arises so often in logic synthesis. One basic problem that has remained largely unaddressed...