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» Multi-clock path analysis using propositional satisfiability
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ITC
2003
IEEE
167views Hardware» more  ITC 2003»
14 years 2 months ago
Path Delay Test Generation for Domino Logic Circuits in the Presence of Crosstalk
A technique to derive test vectors that exercise the worstcase delay effects in a domino circuit in the presence of crosstalk is described. A model for characterizing the delay of...
Rahul Kundu, R. D. (Shawn) Blanton
WSC
2004
13 years 11 months ago
Simulation Output Analysis Based on Excursions
We consider the steady state output analysis problem for a process that satisfies a functional central limit theorem. We construct asymptotically valid confidence intervals for th...
James M. Calvin
SOCIALCOM
2010
13 years 7 months ago
Traffic in Social Media I: Paths Through Information Networks
Wikipedia is used every day by people all around the world, to satisfy a variety of information needs. We crosscorrelate multiple Wikipedia traffic data sets to infer various behav...
Jacob Ratkiewicz, Alessandro Flammini, Filippo Men...
DATAMINE
2002
139views more  DATAMINE 2002»
13 years 9 months ago
Using Site Semantics to Analyze, Visualize, and Support Navigation
To satisfy potential customers of a Web site and to lead them to the goods offered by the site, one should support them in the course of navigation they have embarked on. This pape...
Bettina Berendt
ECAI
2006
Springer
13 years 11 months ago
Solving Optimization Problems with DLL
Propositional satisfiability (SAT) is a success story in Computer Science and Artificial Intelligence: SAT solvers are currently used to solve problems in many different applicati...
Enrico Giunchiglia, Marco Maratea