395 search results - page 78 / 79 » Multilevel Circuit Partitioning |
DATE
2009
IEEE
14 years 2 months ago
2009
IEEE
Nanometer CMOS scaling has resulted in greatly increased circuit variability, with extremely adverse consequences on design predictability and yield. A number of recent works have...
CF
2008
ACM
14 years 25 days ago
2008
ACM
The current methodology used in mass-market processor design is to create a single base microarchitecture (e.g., Intel's "Core"or AMD's"K8") that is ...
FMSD
2007
13 years 10 months ago
2007
Symbolic techniques based on Binary Decision Diagrams (BDDs) are widely employed for reasoning about temporal properties of hardware circuits and synchronous controllers. However, ...
CORR
2004
Springer
13 years 10 months ago
2004
Springer
We define the concept of dependence among multiple variables using maximum entropy techniques and introduce a graphical notation to denote the dependencies. Direct inference of in...
VLSISP
2010
13 years 9 months ago
2010
A Split decoding algorithm is proposed which divides each row of the parity check matrix into two or multiple nearly-independent simplified partitions. The proposed method signific...