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ICCD
2007
IEEE
183views Hardware» more  ICCD 2007»
14 years 4 months ago
Constraint satisfaction in incremental placement with application to performance optimization under power constraints
We present new techniques for explicit constraint satisfaction in the incremental placement process. Our algorithm employs a Lagrangian Relaxation (LR) type approach in the analyt...
Huan Ren, Shantanu Dutt
DAC
1997
ACM
13 years 12 months ago
A Graph-Based Synthesis Algorithm for AND/XOR Networks
In this paper, we introduce a Shared Multiple Rooted XORbased Decomposition Diagram XORDD to represent functions with multiple outputs. Based on the XORDD representation, we dev...
Yibin Ye, Kaushik Roy
CLA
2007
13 years 9 months ago
An FDP-Algorithm for Drawing Lattices
In this work we want to discuss an algorithm for drawing line diagrams of lattices based on force directed placement (FDP). This widely used technique in graph drawing introduces f...
Christian Zschalig
EURODAC
1995
IEEE
127views VHDL» more  EURODAC 1995»
13 years 11 months ago
Layout synthesis for datapath designs
DPLAYOUT is a layout synthesis tool for bit-sliced datapath designs targeting standard-cell libraries. We developed fast and efficient heuristics for placing the cells in a bit-s...
Naveen Buddi, Malgorzata Chrzanowska-Jeske, Charle...
FPGA
2004
ACM
137views FPGA» more  FPGA 2004»
14 years 1 months ago
Multi-resource aware partitioning algorithms for FPGAs with heterogeneous resources
As FPGA densities increase, partitioning-based FPGA placement approaches are becoming increasingly important as they can be used to provide high-quality and computationally scalab...
Navaratnasothie Selvakkumaran, Abhishek Ranjan, Sa...