377 search results - page 14 / 76 » Multiple Instruction Stream Processor |
IEEEPACT
2007
IEEE
14 years 2 months ago
2007
IEEE
Continued scaling of CMOS technology to smaller transistor sizes makes modern processors more susceptible to both transient and permanent hardware faults. Circuitlevel techniques ...
ISCA
1997
IEEE
13 years 12 months ago
1997
IEEE
The performance tradeoff between hardware complexity and clock speed is studied. First, a generic superscalar pipeline is defined. Then the specific areas of register renaming, ...
FPL
2005
Springer
14 years 1 months ago
2005
Springer
Abstract. We propose CUSTARD — CUStomisable Threaded ARchitecture — a soft processor design space that combines support for multiple hardware threads and automatically generate...
ICPP
2000
IEEE
14 years 2 days ago
2000
IEEE
This work considers the use of a n S M T (simultaneous multithreading) processor in lieu of the conventional processor(s) in a router and evaluates quantitatively the potential ga...
ASPLOS
2008
ACM
13 years 9 months ago
2008
ACM
Recently, the number of cores on general-purpose processors has been increasing rapidly. Using conventional programming models, it is challenging to effectively exploit these core...