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CC
2000
Springer
134views System Software» more  CC 2000»
13 years 7 months ago
Pipelined Java Virtual Machine Interpreters
The performance of a Java Virtual Machine (JVM) interpreter running on a very long instruction word (VLIW) processor can be improved by means of pipelining. While one bytecode is i...
Jan Hoogerbrugge, Lex Augusteijn
VLSID
2003
IEEE
183views VLSI» more  VLSID 2003»
14 years 8 months ago
Design of a 2D DCT/IDCT application specific VLIW processor supporting scaled and sub-sampled blocks
We present an innovative design of an accurate, 2D DCT IDCT processor, which handles scaled and sub-sampled input blocks efficiently. In the IDCT mode, the latency of the processo...
Rohini Krishnan, Om Prakash Gangwal, Jos T. J. van...
FPGA
2009
ACM
183views FPGA» more  FPGA 2009»
14 years 2 months ago
HW/SW methodologies for synchronization in FPGA multiprocessors
Modern Field Programmable Gate Arrays (FPGA) can be programmed with multiple soft-core processors. These solutions can be used for MultiProcessor Systems-on-Chip (MPSoCs) prototyp...
Antonino Tumeo, Christian Pilato, Gianluca Palermo...
FPGA
2004
ACM
119views FPGA» more  FPGA 2004»
14 years 1 months ago
A quantitative analysis of the speedup factors of FPGAs over processors
The speedup over a microprocessor that can be achieved by implementing some programs on an FPGA has been extensively reported. This paper presents an analysis, both quantitative a...
Zhi Guo, Walid A. Najjar, Frank Vahid, Kees A. Vis...
IEEEPACT
2003
IEEE
14 years 1 months ago
The Impact of Resource Partitioning on SMT Processors
Simultaneous multithreading (SMT) increases processor throughput by multiplexing resources among several threads. Despite the commercial availability of SMT processors, several as...
Steven E. Raasch, Steven K. Reinhardt