377 search results - page 44 / 76 » Multiple Instruction Stream Processor |
IPPS
1998
IEEE
14 years 1 months ago
1998
IEEE
With aggressive superscalar processors delivering diminishing returns, alternate designs that make good use of the increasing chip densities are actively being explored. One such ...
ASPDAC
2004
ACM
14 years 2 months ago
2004
ACM
— The growing use of digital signal processors (DSPs) in embedded systems necessitates the use of optimizing compilers supporting their special architecture features. Beside the ...
CORR
2011
Springer
13 years 4 months ago
2011
Springer
Modern high-end machines feature multiple processor packages, each of which contains multiple independent cores and integrated memory controllers connected directly to dedicated ph...
MICRO
1995
IEEE
14 years 15 days ago
1995
IEEE
Untolerated load instruction latencies often have a significant impact on overall program performance. As one means of mitigating this effect, we present an aggressive hardware-b...
ICMCS
2008
IEEE
14 years 3 months ago
2008
IEEE
A simple free viewpoint video system which is able not only to display user-specified views at arbitrary angle but also to efficiently stream the necessary video over a network ...