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» Multiplications of Floating Point Expansions
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FCCM
2007
IEEE
165views VLSI» more  FCCM 2007»
14 years 19 days ago
Sparse Matrix-Vector Multiplication Design on FPGAs
Creating a high throughput sparse matrix vector multiplication (SpMxV) implementation depends on a balanced system design. In this paper, we introduce the innovative SpMxV Solver ...
Junqing Sun, Gregory D. Peterson, Olaf O. Storaasl...
ISPDC
2010
IEEE
13 years 9 months ago
Pretty Good Accuracy in Matrix Multiplication with GPUs
—With systems such as Road Runner, there is a trend in super computing to offload parallel tasks to special purpose co-processors, composed of many relatively simple scalar proc...
Matthew Badin, Lubomir Bic, Michael B. Dillencourt...
ISCAS
2006
IEEE
107views Hardware» more  ISCAS 2006»
14 years 4 months ago
A versatile computation module for adaptable multimedia processors
—This paper describes a low cost, low power, versatile computation module that can be used as a coarse-grain building block in multimedia processors. The module, which has a data...
Yunan Xiang, R. Pettibon, Martin Margala
EVOW
1999
Springer
14 years 3 months ago
Evolution of Digital Filters Using a Gate Array Model
The traditional paradigm for digital filter design is based on the concept of a linear difference equation with the output response being a weighted sum of signal samples with usua...
Julian F. Miller
DSD
2004
IEEE
106views Hardware» more  DSD 2004»
14 years 2 months ago
Finite Precision Analysis of Support Vector Machine Classification in Logarithmic Number Systems
In this paper we present an analysis of the minimal hardware precision required to implement Support Vector Machine (SVM) classification within a Logarithmic Number System archite...
Faisal M. Khan, Mark G. Arnold, William M. Potteng...