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IPPS
2008
IEEE
14 years 1 months ago
Reducing the run-time of MCMC programs by multithreading on SMP architectures
The increasing availability of multi-core and multiprocessor architectures provides new opportunities for improving the performance of many computer simulations. Markov Chain Mont...
Jonathan M. R. Byrd, Stephen A. Jarvis, A. H. Bhal...
MICRO
2006
IEEE
145views Hardware» more  MICRO 2006»
14 years 1 months ago
ASR: Adaptive Selective Replication for CMP Caches
The large working sets of commercial and scientific workloads stress the L2 caches of Chip Multiprocessors (CMPs). Some CMPs use a shared L2 cache to maximize the on-chip cache c...
Bradford M. Beckmann, Michael R. Marty, David A. W...
ICCAD
1993
IEEE
104views Hardware» more  ICCAD 1993»
13 years 11 months ago
Parallel timing simulation on a distributed memory multiprocessor
Circuit simulation is one of the most computationally expensive tasks in circuit design and optimization. Detailed simulation at the level of precision of SPICE is usually perform...
Chih-Po Wen, Katherine A. Yelick
ISOLA
2010
Springer
13 years 6 months ago
Ten Years of Performance Evaluation for Concurrent Systems Using CADP
This article comprehensively surveys the work accomplished during the past decade on an approach to analyze concurrent systems qualitatively and quantitatively, by combining functi...
Nicolas Coste, Hubert Garavel, Holger Hermanns, Fr...
BMCBI
2010
185views more  BMCBI 2010»
13 years 2 months ago
MetaPIGA v2.0: maximum likelihood large phylogeny estimation using the metapopulation genetic algorithm and other stochastic heu
Background: The development, in the last decade, of stochastic heuristics implemented in robust application softwares has made large phylogeny inference a key step in most compara...
Raphaël Helaers, Michel C. Milinkovitch