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IPPS
2000
IEEE
14 years 2 days ago
2000
IEEE
This paper presents experimental results for a parallel pipeline STAP system with I/O task implementation using the parallel file systems on the Intel Paragon and the IBM SP. In ...
NPC
2010
Springer
13 years 6 months ago
2010
Springer
Achieving high performance on today’s architectures requires careful orchestration of many optimization parameters. In particular, the presence of shared-caches on multicore arch...
HPCA
2000
IEEE
14 years 3 days ago
2000
IEEE
Memorylatency isbecominganincreasingly importantperformance bottleneck, especially in multiprocessors. One technique for tolerating memory latency is multithreading, whereby we sw...
PODC
1994
ACM
13 years 11 months ago
1994
ACM
In this paper, we investigate the practical performance of lock-free techniques that provide synchronization on shared-memory multiprocessors. Our goal is to provide a technique t...
IPPS
2007
IEEE
14 years 2 months ago
2007
IEEE