Sciweavers

5190 search results - page 56 / 1038
» Multithreaded Parallel Computer Model with Performance Evalu...
Sort
View
SPAA
2004
ACM
14 years 1 months ago
The potential in energy efficiency of a speculative chip-multiprocessor
While lower supply voltage is effective for energy reduction, it suffers performance loss. To mitigate the loss, we propose to execute only the part, which does not have any influ...
Yuu Tanaka, Toshinori Sato, Takenori Koushiro
ISHPC
2003
Springer
14 years 28 days ago
Tolerating Branch Predictor Latency on SMT
Abstract. Simultaneous Multithreading (SMT) tolerates latency by executing instructions from multiple threads. If a thread is stalled, resources can be used by other threads. Howev...
Ayose Falcón, Oliverio J. Santana, Alex Ram...
HPCA
1998
IEEE
13 years 11 months ago
Non-Stalling CounterFlow Architecture
The counterflow pipeline concept was originated by Sproull et al.[1] to demonstrate the concept of asynchronous circuits. This architecture relies on distributed decision making an...
Michael F. Miller, Kenneth J. Janik, Shih-Lien Lu
IPPS
2005
IEEE
14 years 1 months ago
MegaProto: A Low-Power and Compact Cluster for High-Performance Computing
“MegaProto” is a proof-of-concept prototype for our project “Mega-Scale Computing Based on Low-Power Technology and Workload Modeling”, implementing our key idea that a mi...
Hiroshi Nakashima, Hiroshi Nakamura, Mitsuhisa Sat...
ICPP
2005
IEEE
14 years 1 months ago
Performance Evaluation of View-Oriented Parallel Programming
This paper evaluates the performance of a novel View-Oriented Parallel Programming style for parallel programming on cluster computers. View-Oriented Parallel Programming is based...
Zhiyi Huang, Martin K. Purvis, Paul Werstein