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FAW
2007
Springer
110views Algorithms» more  FAW 2007»
14 years 4 months ago
Maximizing the Number of Independent Labels in the Plane
In this paper, we consider a map labeling problem to maximize the number of independent labels in the plane. We first investigate the point labeling model that each label can be ...
Kuen-Lin Yu, Chung-Shou Liao, Der-Tsai Lee
ICCAD
1997
IEEE
122views Hardware» more  ICCAD 1997»
14 years 2 months ago
Approximate timing analysis of combinational circuits under the XBD0 model
This paper is concerned with approximate delay computation algorithms for combinational circuits. As a result of intensive research in the early 90’s [3, 8] efficient tools exi...
Yuji Kukimoto, Wilsin Gosti, Alexander Saldanha, R...
CAV
2004
Springer
151views Hardware» more  CAV 2004»
14 years 1 months ago
QB or Not QB: An Efficient Execution Verification Tool for Memory Orderings
We study the problem of formally verifying shared memory multiprocessor executions against memory consistency models--an important step during post-silicon verification of multipro...
Ganesh Gopalakrishnan, Yue Yang, Hemanthkumar Siva...
FMICS
2006
Springer
14 years 1 months ago
SAT-Based Verification of LTL Formulas
Abstract. Bounded model checking (BMC) based on satisfiability testing (SAT) has been introduced as a complementary technique to BDDbased symbolic model checking of LTL properties ...
Wenhui Zhang
CAV
2008
Springer
139views Hardware» more  CAV 2008»
13 years 11 months ago
CSIsat: Interpolation for LA+EUF
We present CSIsat, an interpolating decision procedure for the quantifier-free theory of rational linear arithmetic and equality with uninterpreted function symbols. Our implementa...
Dirk Beyer, Damien Zufferey, Rupak Majumdar