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HIPEAC
2007
Springer
14 years 1 months ago
Reducing Exit Stub Memory Consumption in Code Caches
Abstract. The interest in translation-based virtual execution environments (VEEs) is growing with the recognition of their importance in a variety of applications. However, due to ...
Apala Guha, Kim M. Hazelwood, Mary Lou Soffa
ISCA
2011
IEEE
522views Hardware» more  ISCA 2011»
12 years 11 months ago
CPPC: correctable parity protected cache
Due to shrinking feature sizes processors are becoming more vulnerable to soft errors. Write-back caches are particularly vulnerable since they hold dirty data that do not exist i...
Mehrtash Manoochehri, Murali Annavaram, Michel Dub...
IPPS
2007
IEEE
14 years 1 months ago
Optimizing Inter-Nest Data Locality Using Loop Splitting and Reordering
With the increasing gap between processor speed and memory latency, the performance of data-dominated programs are becoming more reliant on fast data access, which can be improved...
Sofiane Naci
DCC
2008
IEEE
14 years 7 months ago
A Lower Bound on the Redundancy of Arithmetic-Type Delay Constrained Coding
In a previous paper we derived an upper bound on the redundancy of an arithmetic-type encoder for a memoryless source, designed to meet a finite endto-end strict delay constraint....
Eado Meron, Ofer Shayevitz, Meir Feder, Ram Zamir
KBSE
2005
IEEE
14 years 1 months ago
Testing in resource constrained execution environments
Software for resource constrained embedded devices is often implemented in the Java programming language because the Java compiler and virtual machine provide enhanced safety, por...
Gregory M. Kapfhammer, Mary Lou Soffa, Daniel Moss...