222 search results - page 21 / 45 » Nested Loops Revisited |
IEEEPACT
2007
IEEE
14 years 1 months ago
2007
IEEE
Loop nest optimization is a combinatorial problem. Due to the growing complexity of modern architectures, it involves two increasingly difficult tasks: (1) analyzing the profita...
FPGA
2012
ACM
12 years 3 months ago
2012
ACM
Memory bandwidth is critical to achieving high performance in many FPGA applications. The bandwidth of SDRAM memories is, however, highly dependent upon the order in which address...
SCOPES
2004
Springer
14 years 25 days ago
2004
Springer
New embedded signal processing architectures are emerging that are composed of loosely coupled heterogeneous components like CPUs or DSPs, specialized IP cores, reconfigurable uni...
ICRA
2006
IEEE
14 years 1 months ago
2006
IEEE
— This paper describes an off-line, iterative algorithm for simultaneous localization and mapping within large indoor environments. The proposed approach is based on the idea of ...
CGO
2004
IEEE
13 years 11 months ago
2004
IEEE
Traditionally, software pipelining is applied either to the innermost loop of a given loop nest or from the innermost loop to the outer loops. In a companion paper, we proposed a ...