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» Network Coding for Speedup in Switches
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CASES
2004
ACM
13 years 11 months ago
Automatic data partitioning for the agere payload plus network processor
With the ever-increasing pervasiveness of the Internet and its stringent performance requirements, network system designers have begun utilizing specialized chips to increase the ...
Steve Carr, Philip H. Sweany
IPPS
2000
IEEE
14 years 4 hour ago
Broadcasting in Hypercubes in the Circuit Switched Model
In this paper, we propose a method which enables us to construct almost optimal broadcast schemes on an n-dimensional hypercube in the circuit switched, -port model. In this mode...
Jean-Claude Bermond, Takako Kodate, Stephane Peren...
ICNP
2003
IEEE
14 years 27 days ago
Stress Resistant Scheduling Algorithms for CIOQ Switches
Practical crossbar scheduling algorithms for CIOQ switches such as PIM and ¢ -SLIP, can perform poorly under extreme traffic conditions, frequently failing to be workconserving....
Prashanth Pappu, Jonathan S. Turner
IFIP
2004
Springer
14 years 29 days ago
The Inherent Queuing Delay of Parallel Packet Switches
The parallel packet switch (PPS) extends the inverse multiplexing architecture, and is extensively used as the core of contemporary commercial switches. A key factor in the perfor...
Hagit Attiya, David Hay
SOSP
1989
ACM
13 years 8 months ago
Threads and Input/Output in the Synthesis Kernel
The Synthesis operating system kernel combines several techniques to provide high performa.nce, incl1iding kernel code synthesis, fine-gra.in scheduling. and optimistic sylicllrol...
Henry Massalin, Calton Pu