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HPCA
2009
IEEE
14 years 11 months ago
Design and evaluation of a hierarchical on-chip interconnect for next-generation CMPs
Performance and power consumption of an on-chip interconnect that forms the backbone of Chip Multiprocessors (CMPs), are directly influenced by the underlying network topology. Bo...
Reetuparna Das, Soumya Eachempati, Asit K. Mishra,...
ASAP
2005
IEEE
96views Hardware» more  ASAP 2005»
14 years 4 months ago
On-Chip Lookup Tables for Fast Symmetric-Key Encryption
On public communication networks such as the Internet, data confidentiality can be provided by symmetric-key ciphers. One of the most common operations used in symmetric-key ciphe...
A. Murat Fiskiran, Ruby B. Lee
CCGRID
2005
IEEE
14 years 4 months ago
Analyzing the advance reservation of lightpaths in lambda-grids
The scheme of advance reservations in dynamically provisioned optical networks is novel, and there are no gridbased applications designed to utilize this scheme. We formally defi...
Sumit Naiksatam, Silvia M. Figueira, Stephen A. Ch...
FTDCS
2004
IEEE
14 years 2 months ago
Self-Aware Distributed Embedded Systems
Distributed embedded sensor networks are now being successfully deployed in environmental monitoring of natural phenomena as well as for applications in commerce and physical secu...
Richard Pon, Maxim A. Batalin, Mohammad H. Rahimi,...
DCOSS
2005
Springer
14 years 3 months ago
Macro-programming Wireless Sensor Networks Using Kairos
The literature on programming sensor networks has focused so far on g higher-level abstractions for expressing local node behavior. Kairos is a natural next step in sensor network ...
Ramakrishna Gummadi, Omprakash Gnawali, Ramesh Gov...