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» Network Time Synchronization Using Clock Offset Optimization
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DFT
2006
IEEE
122views VLSI» more  DFT 2006»
14 years 15 days ago
Efficient and Robust Delay-Insensitive QCA (Quantum-Dot Cellular Automata) Design
The concept of clocking for QCA, referred to as the four-phase clocking, is widely used. However, inherited characteristics of QCA, such as the way to hold state, the way to synch...
Minsu Choi, Myungsu Choi, Zachary D. Patitz, Nohpi...
NOCS
2008
IEEE
14 years 3 months ago
Network Simplicity for Latency Insensitive Cores
In this paper we examine a latency insensitive network composed of very fast and simple circuits that connects SoC cores that are also latency insensitive, de-synchronized, or asy...
Daniel Gebhardt, JunBok You, W. Scott Lee, Kenneth...
CORR
2010
Springer
140views Education» more  CORR 2010»
13 years 5 months ago
Construction of New Delay-Tolerant Space-Time Codes
Perfect Space-Time Codes are optimal codes in their original construction for Multiple Input Multiple Output (MIMO) systems. Based on cyclic division algebras, they are full-rate,...
Mireille Sarkiss, Ghaya Rekaya-Ben Othman, Mohamed...
INFOCOM
2006
IEEE
14 years 2 months ago
A Packing Approach to Compare Slotted and Non-Slotted Medium Access Control
— In multi-hop ad hoc networks, the efficiency of a medium access control protocol under heavy traffic load depends mainly on its ability to schedule a large number of simultan...
Mathilde Durvy, Patrick Thiran
ICCAD
1999
IEEE
97views Hardware» more  ICCAD 1999»
14 years 1 months ago
A methodology for correct-by-construction latency insensitive design
In Deep Sub-Micron (DSM) designs, performance will depend critically on the latency of long wires. We propose a new synthesis methodology for synchronous systems that makes the de...
Luca P. Carloni, Kenneth L. McMillan, Alexander Sa...