264 search results - page 34 / 53 » Network-on-Chip Architecture Exploration Framework |
SBACPAD
2006
IEEE
14 years 1 months ago
2006
IEEE
Performance evaluation of contemporary processors is becoming increasingly difficult due to the lack of proper frameworks. Traditionally, cycle-accurate simulators have been exte...
PLDI
1999
ACM
13 years 12 months ago
1999
ACM
This paper explores compiler techniques for reducing the memory needed to load and run program executables. In embedded systems, where economic incentives to reduce both ram and r...
JRTIP
2008
13 years 7 months ago
2008
Abstract Image registration is a computationally intensive application in the medical imaging domain that places stringent requirements on performance and memory management efficie...
TVLSI
2008
13 years 7 months ago
2008
ion levels. The framework also supports the generation of test constraints, which can be satisfied using a constraint solver to generate tests. A compositional verification approac...
FPL
2005
Springer
14 years 1 months ago
2005
Springer
This paper describes a method based on polynomial approximation for transferring ROM resources used in FPGA designs to multiplication and addition operations. The technique can be...