77 search results - page 14 / 16 » Network-on-chip link analysis under power and performance co... |
WWIC
2010
Springer
14 years 12 days ago
2010
Springer
In this paper, we propose a new Distributed Cooperation and Diversity Combining framework. Our focus is heterogeneous networks with devices equipped with two types of radio frequen...
VLSID
2007
IEEE
14 years 7 months ago
2007
IEEE
Interconnect is one of the major concerns in current and future microprocessor designs from both performance and power consumption perspective. The emergence of three-dimensional ...
IPSN
2004
Springer
14 years 22 days ago
2004
Springer
Due to constraints in cost, power, and communication, losses often arise in large sensor networks. The sensor can be modeled as an output of a linear stochastic system with random...
TCBB
2008
13 years 7 months ago
2008
Abstract-- Many statistical measures and algorithmic techniques have been proposed for studying residue coupling in protein families. Generally speaking, two residue positions are ...
ISLPED
2009
ACM
14 years 1 days ago
2009
ACM
We investigate techniques to design 45nm minimum-energy subthreshold CMOS circuits under timing constraints, considering the practical case of an 8-bit multiplier. We first show ...