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FCCM
2000
IEEE
103views VLSI» more  FCCM 2000»
14 years 1 days ago
A Networked FPGA-Based Hardware Implementation of a Neural Network Application
This paper describes a networked FPGA-based implementation of the FAST (Flexible Adaptable-Size Topology) architecture, a Arti cial Neural Network (ANN) that dynamically adapts it...
Héctor Fabio Restrepo, Ralph Hoffmann, Andr...
DATE
2003
IEEE
88views Hardware» more  DATE 2003»
14 years 28 days ago
Ubiquitous Access to Reconfigurable Hardware: Application Scenarios and Implementation Issues
This paper presents an approach for the integration of reconfigurable hardware and computer applications based on the concept of ubiquitous computing. The goal is to allow a netwo...
Leandro Soares Indrusiak, Florian Lubitz, Ricardo ...
ICES
2010
Springer
277views Hardware» more  ICES 2010»
13 years 5 months ago
An Efficient, High-Throughput Adaptive NoC Router for Large Scale Spiking Neural Network Hardware Implementations
Recently, a reconfigurable and biologically inspired paradigm based on network-on-chip (NoC) and spiking neural networks (SNNs) has been proposed as a new method of realising an ef...
Snaider Carrillo, Jim Harkin, Liam McDaid, Sandeep...
NIPS
2004
13 years 9 months ago
On-Chip Compensation of Device-Mismatch Effects in Analog VLSI Neural Networks
Device mismatch in VLSI degrades the accuracy of analog arithmetic circuits and lowers the learning performance of large-scale neural networks implemented in this technology. We s...
Miguel Figueroa, Seth Bridges, Chris Diorio