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» New Directions in Debugging Hardware Designs
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DELTA
2004
IEEE
14 years 11 days ago
Arithmetic Transformations to Maximise the Use of Compressor Trees
Complex arithmetic computations, especially if derived from bit-level software descriptions, can be very inefficient if implemented directly in hardware (e.g., by translation of t...
Paolo Ienne, Ajay K. Verma
DATE
2000
IEEE
142views Hardware» more  DATE 2000»
14 years 1 months ago
Power and Delay Reduction via Simultaneous Logic and Placement Optimization in FPGAs
Traditional FPGA design flows have treated logic synthesis and physical design as separate steps. With the recent advances in technology, the lack of information on the physical ...
Balakrishna Kumthekar, Fabio Somenzi
FPL
2009
Springer
107views Hardware» more  FPL 2009»
14 years 1 months ago
An FPGA based verification platform for HyperTransport 3.x
In this paper we present a verification platform designed for HyperTransport 3.x (HT3) applications. HyperTransport 3.x is a very low latency and high bandwidth chip-tochip interc...
Heiner Litz, Holger Fröning, Maximilian Th&uu...
ISPD
2005
ACM
188views Hardware» more  ISPD 2005»
14 years 2 months ago
A semi-persistent clustering technique for VLSI circuit placement
Placement is a critical component of today's physical synthesis flow with tremendous impact on the final performance of VLSI designs. However, it accounts for a significant p...
Charles J. Alpert, Andrew B. Kahng, Gi-Joon Nam, S...
SAMOS
2007
Springer
14 years 2 months ago
A Study of Energy Saving in Customizable Processors
Abstract. Embedded systems are special purpose systems which perform predefined tasks with very specific requirements like high performance, low volume or low power. Most of the ...
Paolo Bonzini, Dilek Harmanci, Laura Pozzi