Secure processor architectures enable new sets of applications such as commercial grid computing, software copy protection and secure mobile agents by providing secure computing e...
Chenghuai Lu, Tao Zhang, Weidong Shi, Hsien-Hsin S...
A high-speed and secure dynamic partial reconfiguration (DPR) system is realized with AES-GCM that guarantees both confidentiality and authenticity of FPGA bitstreams. In DPR syst...
Yohei Hori, Akashi Satoh, Hirofumi Sakane, Kenji T...
Classifying network flows by their application type is the backbone of many crucial network monitoring and controlling tasks, including billing, quality of service, security and tr...
Roni Bar-Yanai, Michael Langberg, David Peleg, Lia...
Transport Triggered Architecture (TTA) offers a costeffective trade-off between the size and performance of ASICs and the programmability of general-purpose processors. In this pa...
Abstract. Recently, the Csignature scheme has been completely broken by Dubois et al. [2, 3]. As a consequence, the security of SFLASH and other multivariate public key systems hav...