621 search results - page 50 / 125 » Next Generation Network Processors |
SC
2009
ACM
14 years 3 months ago
2009
ACM
Manycore processors with wide SIMD cores are becoming a popular choice for the next generation of throughput oriented architectures. We introduce a hardware technique called “di...
EUROPAR
2009
Springer
14 years 3 months ago
2009
Springer
The availability of large-scale computing platforms comprised of tens of thousands of multicore processors motivates the need for the next generation of highly scalable sparse line...
ISCA
1999
IEEE
14 years 29 days ago
1999
IEEE
This paper presents a technique called register value prediction (RVP) which uses a type of locality called register-value reuse. By predicting that an instruction will produce th...
ASPLOS
2011
ACM
13 years 8 days ago
2011
ACM
Transactional memory (TM) is a promising synchronization mechanism for the next generation of multicore processors. Best-effort Hardware Transactional Memory (HTM) designs, such a...
BROADNETS
2006
IEEE
14 years 12 days ago
2006
IEEE
A new scalable optical network infrastructure SMART is proposed based on light-trails and hypernetwork architecture. The underlying physical network of SMART is a reconfigurable WD...