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ICTAI
2002
IEEE
14 years 1 months ago
Calculus of Variations in Discrete Space for Constrained Nonlinear Dynamic Optimization
In this paper, we propose new dominance relations that can speed up significantly the solution process of nonlinear constrained dynamic optimization problems in discrete time and...
Yixin Chen, Benjamin W. Wah
CDC
2009
IEEE
131views Control Systems» more  CDC 2009»
14 years 1 months ago
Dynamic clock calibration via temperature measurement
— We study a clock calibration problem for an ultra-low power timer on a sensor node platform. When the sensor is put into sleep mode, this timer is the only thing left running, ...
David I. Shuman, Mingyan Liu
ISPD
2000
ACM
126views Hardware» more  ISPD 2000»
14 years 1 months ago
A practical clock tree synthesis for semi-synchronous circuits
In this paper, we propose a new clock tree synthesis method for semi-synchronous circuits. A clock tree obtained by the proposed method is a multi-level multi-way clock tree such ...
Masahiko Toyonaga, Keiichi Kurokawa, Takuya Yasui,...
HCW
1999
IEEE
14 years 28 days ago
Multiple Cost Optimization for Task Assignment in Heterogeneous Computing Systems Using Learning Automata
A framework for task assignment in heterogeneous computing systems is presented in this work. The framework is based on a learning automata model. The proposed model can be used f...
Raju D. Venkataramana, N. Ranganathan
ICCAD
1993
IEEE
104views Hardware» more  ICCAD 1993»
14 years 23 days ago
Parallel timing simulation on a distributed memory multiprocessor
Circuit simulation is one of the most computationally expensive tasks in circuit design and optimization. Detailed simulation at the level of precision of SPICE is usually perform...
Chih-Po Wen, Katherine A. Yelick