This paper presents a Boolean based symbolic model checking algorithm for the verification of analog/mixedsignal (AMS) circuits. The systems are modeled in VHDL-AMS, a hardware des...
David Walter, Scott Little, Nicholas Seegmiller, C...
Current verification condition (VC) generation algorithms, such as weakest preconditions, yield a VC whose size may be exponential in the size of the code fragment being checked. ...
We present a compositional method for the verification of component-based systems described in a subset of the BIP language encompassing multi-party interaction without data transf...
Saddek Bensalem, Marius Bozga, Joseph Sifakis, Tha...
Verification of partially synchronous distributed systems is difficult because of inherent concurrency and the potentially large state space of the channels. This paper identifies ...
Behaviour of systems is described by formal languages: the sets of all sequences of actions. Regarding ion, alphabetic language homomorphisms are compute abstract behaviours. To a...