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VLSID
2007
IEEE
97views VLSI» more  VLSID 2007»
14 years 8 months ago
Efficient Microprocessor Verification using Antecedent Conditioned Slicing
We present a technique for automatic verification of pipelined microprocessors using model checking. Antecedent conditioned slicing is an efficient abstraction technique for hardw...
Shobha Vasudevan, Vinod Viswanath, Jacob A. Abraha...
ICCAD
2010
IEEE
186views Hardware» more  ICCAD 2010»
13 years 6 months ago
Efficient state space exploration: Interleaving stateless and state-based model checking
State-based model checking methods comprise computing and storing reachable states, while stateless model checking methods directly reason about reachable paths using decision proc...
Malay K. Ganai, Chao Wang, Weihong Li
FDL
2007
IEEE
14 years 2 months ago
APDL: A Processor Description Language For Design Space Exploration of Embedded Processors
—This paper presents Anahita Processor Description Language (APDL) for generation of retargetable processor design tool sets. The emphasis is on the applicability of the generate...
Nima Honarmand, Hasan Sohofi, Maghsoud Abbaspour, ...
HYBRID
2007
Springer
14 years 9 days ago
Safety Verification of an Aircraft Landing Protocol: A Refinement Approach
Abstract. In this paper, we propose a new approach for formal verification of hybrid systems. To do so, we present a new refinement proof technique, a weak refinement using step in...
Shinya Umeno, Nancy A. Lynch
IASTEDSEA
2004
13 years 9 months ago
Java bytecode verification with dynamic structures
Java applets run on a Virtual Machine that checks code's integrity and correctness before execution using a module called Bytecode Verifier. Java Card technology allows Java ...
Cinzia Bernardeschi, Luca Martini, Paolo Masci