339 search results - page 50 / 68 » Noise-tolerant dynamic circuit design |
ASPDAC
2005
ACM
13 years 11 months ago
2005
ACM
Power has become an increasingly important design constraint for FPGAs in nanometer technologies, and global interconnects should be the focus of FPGA power reduction as they cons...
SAMOS
2007
Springer
14 years 3 months ago
2007
Springer
In this paper, we use the CoDeL hardware design platform to analyze the potential and performance impact of power gating individual registers. For each register, we examine the per...
CDC
2008
IEEE
14 years 4 months ago
2008
IEEE
Ionic polymer-metal composites (IPMCs) form an important category of electroactive polymers and have many potential applications in biomedical, robotic and micro/nano manipulation ...
ICCAD
1998
IEEE
14 years 2 months ago
1998
IEEE
In this paper we present a new fanout optimization algorithm which is particularly suitable for digital circuits designed with submicron CMOS technologies. Restricting the class o...
ARVLSI
2001
IEEE
14 years 1 months ago
2001
IEEE
Output Prediction Logic (OPL) is a technique that can be applied to conventional CMOS logic families to obtain considerable speedups. When applied to static CMOS, OPL retains the ...