325 search results - page 28 / 65 » Non-uniform Instruction Scheduling |
CF
2004
ACM
14 years 4 months ago
2004
ACM
Centralized register file architectures scale poorly in terms of clock rate, chip area, and power consumption and are thus not suitable for consumer electronic devices. The conse...
ASPLOS
2010
ACM
14 years 5 months ago
2010
ACM
To make efficient use of CMPs with tens to hundreds of cores, it is often necessary to exploit fine-grain parallelism. However, managing tasks of a few thousand instructions is ...
IEEEPACT
2006
IEEE
14 years 4 months ago
2006
IEEE
In SMT processors, the complex interplay between private and shared datapath resources needs to be considered in order to realize the full performance potential. In this paper, we...
ASPLOS
2000
ACM
14 years 3 months ago
2000
ACM
Simultaneous Multithreading machines fetch and execute instructions from multiple instruction streams to increase system utilization and speedup the execution of jobs. When there ...
CL
2000
Springer
14 years 2 months ago
2000
Springer
We use Kleene algebra with tests to verify a wide assortment of common compiler optimizations, including dead code elimination, common subexpression elimination, copy propagation,...