Sciweavers

325 search results - page 50 / 65
» Non-uniform Instruction Scheduling
Sort
View
JIT
2004
Springer
94views Database» more  JIT 2004»
14 years 23 days ago
Self-accounting as Principle for Portable CPU Control in Java
In this paper we present a novel scheme for portable CPU accounting and control in Java, which is based on program transformation techniques and can be used with every standard Jav...
Walter Binder, Jarle Hulaas
MICRO
1994
IEEE
81views Hardware» more  MICRO 1994»
13 years 11 months ago
Register file port requirements of transport triggered architectures
Exploitation of large amounts of instruction level parallelism requires a large amount of connectivity between the shared register file and the function units; this connectivity i...
Jan Hoogerbrugge, Henk Corporaal
CASES
2001
ACM
13 years 11 months ago
Tailoring pipeline bypassing and functional unit mapping to application in clustered VLIW architectures
In this paper we describe a design exploration methodology for clustered VLIW architectures. The central idea of this work is a set of three techniques aimed at reducing the cost ...
Marcio Buss, Rodolfo Azevedo, Paulo Centoducatte, ...
DFT
2008
IEEE
151views VLSI» more  DFT 2008»
13 years 9 months ago
Design and Evaluation of a Timestamp-Based Concurrent Error Detection Method (CED) in a Modern Microprocessor Controller
This paper presents a concurrent error detection technique for the control logic of a modern microprocessor. Our method is based on execution time prediction for each instruction ...
Michail Maniatakos, Naghmeh Karimi, Yiorgos Makris...
CASCON
1996
118views Education» more  CASCON 1996»
13 years 8 months ago
Automatic parallelization for symmetric shared-memory multiprocessors
The trend in workstation hardware is towards symmetric shared-memory multiprocessors (SMPs). User expectations are for (largely) automatic exploitation of parallelismon an SMP, si...
Jyh-Herng Chow, Leonard E. Lyon, Vivek Sarkar