Tailoring pipeline bypassing and functional unit mapping to application in clustered VLIW architectures

In this paper we describe a design exploration methodology for clustered VLIW architectures. The central idea of this work is a set of three techniques aimed at reducing the cost of expensive inter-cluster copy operations. Instruction scheduling is performed using a list-scheduling algorithm that stores operand chains into the same register file. Functional units are assigned to clusters based on the application inter-cluster communication pattern. Finally, a careful insertion of pipeline bypasses is used to increase the number of data-dependencies that can be satisfied by pipeline register operands. Experimental results, using the SPEC95 benchmark and the IMPACT compiler, reveal a substantial reduction in the number of copies between clusters.

• Type: Conference
• Year: 2001
• Where: CASES
• Authors: Marcio Buss, Rodolfo Azevedo, Paulo Centoducatte, Guido Araujo
• Keywords: CASES 2001, Design Exploration Methodology, Expensive Inter-cluster Copy, Pipeline Register Operands, System Software