325 search results - page 7 / 65 » Non-uniform Instruction Scheduling |
MICRO
2000
IEEE
13 years 11 months ago
2000
IEEE
A machine’s performance is the product of its IPC (Instructions Per Cycle) and clock frequency. Recently, Palacharla, Jouppi, and Smith [3] warned that the dynamic instruction s...
PLDI
2000
ACM
13 years 11 months ago
2000
ACM
{ This paper presents a new approach to local instruction scheduling based on integer programming that produces optimal instruction schedules in a reasonable time, even for very la...
HPCA
2004
IEEE
14 years 7 months ago
2004
IEEE
Modern microprocessors adopt speculative scheduling techniques where instructions are scheduled several clock cycles before they actually execute. Due to this scheduling delay, sc...
APCSAC
2005
IEEE
14 years 1 months ago
2005
IEEE
Abstract. Power-balanced instruction scheduling for Very Long Instruction Word (VLIW) processors is an optimization problem which requires a good instruction-level power model for ...
NIPS
1997
13 years 8 months ago
1997
Program execution speed on modern computers is sensitive, by a factor of two or more, to the order in which instructions are presented to the processor. To realize potential execu...