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» Notes on Implementing a IEEE 802.11s Mesh Point
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144
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ICCAD
2002
IEEE
142views Hardware» more  ICCAD 2002»
16 years 9 days ago
SAT and ATPG: Boolean engines for formal hardware verification
In this survey, we outline basic SAT- and ATPGprocedures as well as their applications in formal hardware verification. We attempt to give the reader a trace trough literature and...
Armin Biere, Wolfgang Kunz
INFOCOM
2006
IEEE
15 years 9 months ago
QoS, Properties and Views to Achieve Dynamic Adaptivity
— This paper presents our work in the context of the Adaptive Resource Management (ARM) internal research project at the University of Milano-Bicocca, Italy. The project addresse...
Stefano Mussino, Mario Riva
159
Voted
ATS
1998
IEEE
170views Hardware» more  ATS 1998»
15 years 7 months ago
A Ring Architecture Strategy for BIST Test Pattern Generation
This paper presents a new effective Built-In Self Test (BIST) scheme that achieves 100% fault coverage with low area overhead, and without any modification of the circuit under tes...
Christophe Fagot, Olivier Gascuel, Patrick Girard,...
161
Voted
TASE
2010
IEEE
14 years 10 months ago
Automated Selection and Placement of Single Cells Using Vision-Based Feedback Control
Abstract--We present a robotic manipulation system for automated selection and transfer of individual living cells to analysis locations. We begin with a commonly used cell transfe...
Y. H. Anis, Mark Holl, Deirdre R. Meldrum
128
Voted
IPPS
2009
IEEE
15 years 10 months ago
Phaser accumulators: A new reduction construct for dynamic parallelism
A reduction is a computation in which a common operation, such as a sum, is to be performed across multiple pieces of data, each supplied by a separate task. We introduce phaser a...
Jun Shirako, David M. Peixotto, Vivek Sarkar, Will...