Sciweavers

980 search results - page 8 / 196
» Novel Test Pattern Generators for Pseudo-Exhaustive Testing
Sort
View
DATE
2004
IEEE
158views Hardware» more  DATE 2004»
14 years 29 days ago
Automatic Scan Insertion and Pattern Generation for Asynchronous Circuits
This paper presents 3LSSD, a novel, easilyautomatable approach for scan insertion and ATPG of asynchronous circuits. 3LSSD inserts scan latches only into global circuit feedback p...
Aristides Efthymiou, Christos P. Sotiriou, Douglas...
GECCO
2009
Springer
162views Optimization» more  GECCO 2009»
14 years 1 months ago
TestFul: using a hybrid evolutionary algorithm for testing stateful systems
This paper introduces TestFul, a framework for testing stateful systems and focuses on object-oriented software. TestFul employs a hybrid multi-objective evolutionary algorithm, t...
Matteo Miraz, Pier Luca Lanzi, Luciano Baresi
XPU
2004
Springer
14 years 2 months ago
Generative Acceptance Testing for Difficult-to-Test Software
Abstract. While there are many excellent acceptance testing tools and frameworks available today, this paper presents an alternative approach, involving generating code from tests ...
Jennitta Andrea
TCAD
2008
114views more  TCAD 2008»
13 years 9 months ago
Test-Quality/Cost Optimization Using Output-Deviation-Based Reordering of Test Patterns
At-speed functional testing, delay testing, and n-detection test sets are being used today to detect deep submicrometer defects. However, the resulting test data volumes are too hi...
Zhanglei Wang, Krishnendu Chakrabarty
ATS
2009
IEEE
99views Hardware» more  ATS 2009»
14 years 4 months ago
Test Generation for Designs with On-Chip Clock Generators
High performance designs often use the on-chip device PLLs for accurate test clock generation during testing. The on-chip clock generator is designed in a programmable way to faci...
Xijiang Lin, Mark Kassab