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DAC
2002
ACM
14 years 10 months ago
Timed compiled-code simulation of embedded software for performance analysis of SOC design
In this paper, a new timing generation method is proposed for the performance analysis of embedded software. The time stamp generation of I/O accesses is crucial to performance es...
Jong-Yeol Lee, In-Cheol Park
ICC
2007
IEEE
130views Communications» more  ICC 2007»
14 years 3 months ago
Queuing with Adaptive Modulation over MIMO Wireless Links for Deadline Constrained Traffic: Cross-Layer Analysis and Design
In this paper, we consider a deadline constrained traffic and analyze the joint effects of packet queuing and adaptive modulation (AM) for packet transmission in MIMO systems. We p...
Jalil S. Harsini, Farshad Lahouti
VTC
2007
IEEE
106views Communications» more  VTC 2007»
14 years 3 months ago
Analysis and Design of Dirty Paper Coding by Transformation of Noise
— We design a coding scheme for Costa’s dirty paper coding (DPC) [6] using a channel and a shaping code. We show that by transforming the channel noise distribution the DPC cha...
Young-Seung Lee, Sae-Young Chung
HOLOMAS
2007
Springer
14 years 3 months ago
A Holonic Metamodel for Agent-Oriented Analysis and Design
Abstract. Holonic multiagent systems (hmas) offers a promising software engineering approach for developing applications in complex domains characterized by a hierarchical structu...
Massimo Cossentino, Nicolas Gaud, Stéphane ...
DSN
2005
IEEE
14 years 2 months ago
Design Time Reliability Analysis of Distributed Fault Tolerance Algorithms
Designing a distributed fault tolerance algorithm requires careful analysis of both fault models and diagnosis strategies. A system will fail if there are too many active faults, ...
Elizabeth Latronico, Philip Koopman