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FPL
2006
Springer
85views Hardware» more  FPL 2006»
14 years 16 days ago
High-Performance and Parameterized Matrix Factorization on FPGAs
FPGAs have become an attractive choice for scientific computing. In this paper, we propose a high performance design for LU decomposition, a key kernel in many scientific and engi...
Ling Zhuo, Viktor K. Prasanna
TWC
2010
13 years 3 months ago
Rateless coding for MIMO fading channels: performance limits and code construction
In this letter the performance limits and design principles of rateless codes over fading channels are studied. The diversity-multiplexing tradeoff (DMT) is used to analyze the sys...
Yijia Fan, Lifeng Lai, Elza Erkip, H. Vincent Poor
IASTEDSE
2004
13 years 10 months ago
Experience of communications software evolution and performance improvement with patterns
: Software evolves as requirements or technologies change. Tremendous efforts are often needed to support software evolution as evolution may involve reverse engineering and subseq...
Chung-Horng Lung, Qiang Zhao, Hui Xu, Heine Mar, P...
JCP
2008
324views more  JCP 2008»
13 years 8 months ago
Low-Power and High-Performance 1-Bit CMOS Full-Adder Cell
In this paper a new low power and high performance adder cell using a new design style called "Bridge" is proposed. The bridge design style enjoys a high degree of regula...
Keivan Navi, Omid Kavehie, Mahnoush Rouholamini, A...
ASPLOS
2006
ACM
14 years 18 days ago
Accurate and efficient regression modeling for microarchitectural performance and power prediction
We propose regression modeling as an efficient approach for accurately predicting performance and power for various applications executing on any microprocessor configuration in a...
Benjamin C. Lee, David M. Brooks