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JSS
2006
104views more  JSS 2006»
13 years 8 months ago
Modelling and simulation of off-chip communication architectures for high-speed packet processors
In this work, we propose a visual, custom-designed, event-driven interconnect simulation framework to evaluate the performance of off-chip multi-processor/memory communications ar...
Jacob Engel, Daniel Lacks, Taskin Koçak
CSL
2007
Springer
14 years 3 months ago
A Games Model of Bunched Implications
A game semantics of the (−−∗, →)-fragment of the logic of bunched implications, BI, is presented. To date, categorical models of BI have been restricted to two kinds: funct...
Guy McCusker, David J. Pym
WSC
2007
13 years 11 months ago
Feasibility study of variance reduction in the logistics composite model
The Logistics Composite Model (LCOM) is a stochastic, discrete-event simulation that relies on probabilities and random number generators to model scenarios in a maintenance unit ...
George P. Cole III, Alan W. Johnson, J. O. Miller
WICSA
2008
13 years 10 months ago
Supporting the Evolution of Product Line Architectures with Variability Model Fragments
Evolution is a permanent challenge in product line engineering. Reusable assets such as software components or documents evolve continuously due to new customer requirements or te...
Deepak Dhungana, Thomas Neumayer, Paul Grünba...
TCS
2008
13 years 8 months ago
Nondeterministic polynomial time factoring in the tile assembly model
Formalized study of self-assembly has led to the definition of the tile assembly model, Previously I presented ways to compute arithmetic functions, such as addition and multiplic...
Yuriy Brun