3224 search results - page 530 / 645 » On Checking Model Checkers |
FORMATS
2003
Springer
14 years 3 months ago
2003
Springer
Probabilistic timed automata, a variant of timed automata extended with discrete probability distributions, is a specification formalism suitable for describing both nondeterminis...
DCC
2010
IEEE
14 years 3 months ago
2010
IEEE
This paper interprets image interpolation as a channel decoding problem and proposes a tanner graph based interpolation framework, which regards each pixel in an image as a variab...
DSN
2000
IEEE
14 years 2 months ago
2000
IEEE
This paper describes an experiment in formal specification and validation performed in the context of an industrial joint project. The project involved an Italian company working...
CONCUR
2000
Springer
14 years 2 months ago
2000
Springer
Abstract. We consider the problem of automatically verifying realtime systems with continuously distributed random delays. We generalise probabilistic timed automata introduced in ...
ATVA
2007
Springer
14 years 2 months ago
2007
Springer
Abstract. Symbolic Trajectory Evaluation (STE) is a powerful technique for hardware model checking. It is based on a 3-valued symbolic simulation, using 0,1 and X n"), where t...