216 search results - page 9 / 44 » On High-Bandwidth Data Cache Design for Multi-Issue Processo... |
IEEEPACT
2005
IEEE
14 years 1 months ago
2005
IEEE
Helper threading is a technique that utilizes a second core or logical processor in a multi-threaded system to improve the performance of the main thread. A helper thread executes...
USENIX
1994
13 years 9 months ago
1994
Despite impressive advances in file system throughput resulting from technologies such as high-bandwidth networks and disk arrays, file system latency has not improved and in many...
ISVLSI
2007
IEEE
14 years 2 months ago
2007
IEEE
As technology scales, more sophisticated fabrication processes cause variations in many different parameters in the device. These variations could severely affect the performance ...
FPL
2008
Springer
13 years 9 months ago
2008
Springer
An example of an FPGA based application for a high-energy physics experiment is presented which features all facets of modern FPGA design. The special requirements here are high b...
PDPTA
2003
13 years 9 months ago
2003
The performance of the data memory hierarchy is extremely important in current and near future high performance superscalar microprocessors. To address the memory gap, computer de...