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» On Modeling Cross-Talk Faults
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JSS
2008
113views more  JSS 2008»
13 years 8 months ago
A model for software rework reduction through a combination of anomaly metrics
Analysis of anomalies reported during testing of a project can tell a lot about how well the processes and products work. Still, organizations rarely use anomaly reports for more t...
Lars-Ola Damm, Lars Lundberg, Claes Wohlin
ICFP
2006
ACM
14 years 8 months ago
Static typing for a faulty lambda calculus
A transient hardware fault occurs when an energetic particle strikes a transistor, causing it to change state. These faults do not cause permanent damage, but may result in incorr...
David Walker, Lester W. Mackey, Jay Ligatti, Georg...
VTS
2000
IEEE
84views Hardware» more  VTS 2000»
14 years 1 months ago
ESIM: A Multimodel Design Error and Fault Simulator for Logic Circuits
ESIM is a simulation tool that integrates logic fault and design error simulation for logic circuits. It targets several design error and fault models, and uses a novel mix of sim...
Hussain Al-Asaad, John P. Hayes
DAC
2009
ACM
14 years 9 months ago
Computing bounds for fault tolerance using formal techniques
Continuously shrinking feature sizes result in an increasing susceptibility of circuits to transient faults, e.g. due to environmental radiation. Approaches to implement fault tol...
André Sülflow, Görschwin Fey, Rol...