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CGO
2004
IEEE
14 years 27 days ago
Exposing Memory Access Regularities Using Object-Relative Memory Profiling
Memory profiling is the process of characterizing a program's memory behavior by observing and recording its response to specific input sets. Relevant aspects of the program&...
Qiang Wu, Artem Pyatakov, Alexey Spiridonov, Easwa...
CODES
2004
IEEE
14 years 27 days ago
Operation tables for scheduling in the presence of incomplete bypassing
Register bypassing is a powerful and widely used feature in modern processors to eliminate certain data hazards. Although complete bypassing is ideal for performance, bypassing ha...
Aviral Shrivastava, Eugene Earlie, Nikil D. Dutt, ...
ESA
2006
Springer
140views Algorithms» more  ESA 2006»
14 years 25 days ago
Latency Constrained Aggregation in Sensor Networks
A sensor network consists of sensing devices which may exchange data through wireless communication. A particular feature of sensor networks is that they are highly energy constrai...
Luca Becchetti, Peter Korteweg, Alberto Marchetti-...
GECCO
2006
Springer
143views Optimization» more  GECCO 2006»
14 years 25 days ago
A hybridized genetic parallel programming based logic circuit synthesizer
Genetic Parallel Programming (GPP) is a novel Genetic Programming paradigm. Based on the GPP paradigm and a local search operator - FlowMap, a logic circuit synthesizing system in...
Wai Shing Lau, Kin-Hong Lee, Kwong-Sak Leung
ARITH
2001
IEEE
14 years 25 days ago
Computer Arithmetic-A Processor Architect's Perspective
The Instruction Set Architecture (ISA) of a programmable processor is the native languageof the machine. It defines the set of operations and resourcesthat are optimized for that ...
Ruby B. Lee
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