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HPCA
2012
IEEE
12 years 3 months ago
2012
IEEE
Since the onset of pipelined processors, balancing the delay of the microarchitectural pipeline stages such that each microarchitectural pipeline stage has an equal delay has been...
ATVA
2004
Springer
14 years 1 months ago
2004
Springer
Timed Bisimulation Preserving Abstraction for Parametric Time-Interval Automata Akio Nakata, Tadaaki Tanimoto, Suguru Sasaki, Teruo Higashino Department of Information Networking, ...
GPEM
2008
13 years 7 months ago
2008
Efficiency enhancement techniques--such as parallelization and hybridization--are among the most important ingredients of practical applications of genetic and evolutionary algori...
HPCA
2009
IEEE
14 years 8 months ago
2009
IEEE
Several recent processor designs have proposed to enhance performance by increasing the clock frequency to the point where timing faults occur, and by adding error-correcting supp...
ICDCS
2009
IEEE
14 years 4 months ago
2009
IEEE
To observe, analyze and control large scale distributed systems and the applications hosted on them, there is an increasing need to continuously monitor performance attributes of ...