867 search results - page 6 / 174 » On Optimization of Test Parallelization with Constraints |
MTDT
2003
IEEE
14 years 27 days ago
2003
IEEE
Memory cores (especially SRAM cores) used on a system chip usually come from a memory compiler. Commercial memory compilers have their limitation— a large memory may need to be ...
IJCAI
1989
13 years 8 months ago
1989
We describe a general technique for expressing domain knowledge in constraint satisfaction problems, and using it to develop optimized parallel arc consistency algorithms for the ...
CSCLP
2004
Springer
13 years 11 months ago
2004
Springer
Covering arrays have been studied for their applications to drug screening and software and hardware testing. In this paper, we model the problem as a constraint program. Our propo...
EVOW
1999
Springer
13 years 12 months ago
1999
Springer
A technique is proposed to reduce the peak power consumption of sequential circuits during test pattern application. High-speed computation intensive VLSI systems, as telecommunica...
GECCO
2008
Springer
13 years 8 months ago
2008
Springer
In this paper, we report on our investigation of factors affecting the performance of various parallelization paradigms for multiobjective evolutionary algorithms. Different paral...